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Has/is anyone else out there dealing with VxWorks BSP documentation?
(If you don't know what VxWorks BSP Documentation is, please ignore this post.)
Anyhow, we're creating several VxWorks BSPs and I want tech writers to move further upstream in the generated documentation and take over some of the documenting that the developers are doing.
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MY QUEST: Is there a s/w tool/utility that generates ASCII character diagrams from traditional line art? See example at the end of this post...
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One of the quirks of VxWorks documentation is the inclusion of ASCII character diagrams. Particularly board layout diagrams and memory maps. In the past I've created good board layout diagrams based on the PCB gerber files using illustration software such as Corel, Freehand, etc., and imported them as EPS. Now VxWorks takes us back in time to the early 80's to ASCII diagrams. I (and no one else) wants to manually create ASCII character diagrams for the VxWorks BSP documentation. We're hoping that there's a utility out there that can generate these.
I've seen a few ComSci projects that convert bitmap photos to ASCII character "pictures" AKA Spock's head rendered in ASCII characters that can be printed out with a daisy-wheel or dot matrix printer. (That is SOOOOO 80's!) But I doubt that they will produce usable results for line art. I'm looking for a tool that is optimized for line art, particulary the VxWorks way of doing things.
EXAMPLE
Here's one of those funky diagrams. The diagram below shows the location of top-side jumpers relevant to VxWorks configuration. (View in non-proportional font. Duh!)
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| ________ o | Red B2 Solano B GPI06
| | | L o | Green B1 Solano B GPI04
| | Solano | E o | Red A2 Solano A GPI06
| | | D o | Green A1 Solano A GPI04
| | | o | Green User Led1 (Boot: processor 1 enabled)
| |________| o | Green User Led1 (Boot: processor 0 enabled)
| ___ |
| 3|--x| o | Green LED 1.8V power OK
| 2|--x| o | Green LED 2.5V power OK
| 1|x--| |
| 0|x--| |
| ___ --- | NOTE: Switch value is 0 when ON, 1 when OFF
| 3|x--| ________ SW3 |
| 2|--x| |Port X | |
| 1|--x| | I/F | ____ |
| 0|--x| | FPGA | | F | |
| --- | (PLD) | | l | |
| SW2 |________| | a | |
| | s | |
| | h | |
| ---- |
| |
| |
| |
| _________ |
|| | |
|| SDRAM | |
||_________| |
| |
| _________ |
|| | |
|| SDRAM | ___ |
||_________| 3|x--| |
| 2|--x| |
| _________ 1|--x| |
|| | 0|x--| |
|| SDRAM | --- |
||_________| SW1 |
| |
| _________ |
|| | |
|| SDRAM | |
||_________| |
| |
| nn-nnnn rev2.0|
|____________________________________|
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